The present invention relates to methods and apparatus for implementing digital radio communication modems with an Integrated Circuit (IC), and more particularly, methods and ICs for implementing the digital up converters (DUC) of intermediate frequency (IF) modems.
Emerging wireless applications such as remote radio heads, WiMAX customer premises equipment (CPE), and software defined radio (SDR) have stringent power consumption and low cost requirements. In addition to these challenges, given the high data rate requirements and ever-evolving standards, designers also need to ensure high performance and flexibility in the end products. Programmable logic devices, such as those owned by Altera Corporation, the assignee of the present application, can be used to meet these requirements for wireless applications at a relative low cost.
Market needs for higher data rates are driving the evolution of wireless cellular systems from narrowband 2G IS-95 systems to current-generation Wideband Code Division Multiple Access (W-CDMA) based 3G and 3.5G systems supporting peak data rates up to 10 Mbps. For future 3rd Generation Partnership Project (3GPP) long-term evolution (LTE) specifications, complex signal processing techniques such as multiple-input multiple-output (MIMO), along with new radio technologies like Orthogonal Frequency-Division Multiple Access (OFDMA), are considered key to achieving target throughputs in excess of 100 Mbps.
The emerging wireless technologies described above pose significant challenges for equipment manufacturers needing to design products that are not only scalable and cost-effective but also flexible and reusable across multiple evolving standards. One piece of digital front end hardware must now be able to handle much more complex digital signal processing at a much higher data rate. For instance, in systems featuring OFDM modulation, crest factor reduction (CFR) and digital pre-distortion (DPD) have become requirements. These advanced signal processing techniques are usually computationally intensive and therefore require a significant amount of silicon (logic area). Consequently, the digital front end implementation must be hardware efficient. Resource reuse is therefore critical and is one of the major driving forces behind digital front end implementation optimization.
It is in this context that embodiments of the invention arise.